400G QSFP-DD AOC Cables – www.philisun.com

400G QSFP-DD to 8×50G SFP56 Active Optical Cable(AOC)

philisun001 — Fri, 06 Mar 2026 11:18:49 +0000

SPECIFICATIONS
Cable End Connector A	QSFP-DD	Cable End Connector B	8×SFP56
Jumper Type	Active Optical Breakout Cable	Data Rate	400G
Aggregate Bit Rate	425Gbps	Lane Bit Rate	53.125Gbps
Number of Channels	8	Single Channel Rate	50G
Array Transmitter	VSCEL	Array Receiver	PIN
Minimum Bend Radius	30mm	Factory Brand	PHILISUN
Center(Operating) Wavelength	850nm	Bit Error Rate	2.4E-4
Fiber Type	OM3 MMF MAX 70m/OM4 MMF MAX 100m	Cable Colour	Aqua
Cable Material	LSZH/OFNP	Cable Length Selection	1-100meter
Safety Certification	TUV/UL/FDA	Application Scenarios	400 Gigabit Ethernet (400GbE)
Protocols	QSFP-DD MSA/SFP6 MSA/IEEE 802.3cd	DDMI(Commercial)	YES
Supply Voltage	3.3V	Power Dissipation	QSFP-DD:<10.0W QSFP56:<3.0W
Operating Temperature	0 to 70℃ (32 to 158℉)	Storage Temperature	-20 to 85℃ (-4 to 185℉)

PRODUCT PRESENTATION

The PHILISUN 400G QSFP-DD to 8x50G SFP56 Active Optical Cable (AOC) provides the highest-density breakout solution, segmenting a single 400G QSFP-DD port into eight individual 50G SFP56 channels. It is fully compliant with QSFP-DD MSA, SFP28 MSA, and the IEEE 802.3cd standard, ensuring reliable performance across massive aggregation layers. This AOC is ideal for connecting high-density Switch to Switch matrices and maximizing bandwidth efficiency between Switch to GPU nodes in large-scale HPC and AI clusters.

AOC SERIES PRODUCTS

PRODUCTION & TESTING EQUIPMENT

PERFORMANCE PARAMETER

Absolute Maximum Ratings
Parameter	Symbol	Unit	Min.	Max.
Storage Temperature Range	TC	℃	-40	+85
Relative Humidity	RH	%	0	85
Power Supply Voltage	VCC	V	-0.5	+3.6

Recommended Operating Conditions
Parameter	Symbol	Unit	Min.	Typ.	Max.
Operating Case Temperature Range	Tca	℃	0	–	70
Power Supply Voltage	VCC	V	3.15	3.3	3.45
Supply Current SFP56 end	Icc	mA	–	26.5625	900
Data Rate Per Lane	DR	Gbps	–	53.125	–
Fiber Bend Radius	Rb	cm	3	–	–
Notes: 1. Supply current is shared between VCCTX and VCCRX. 2. In-rush is defined as current level above steady state current requirements.

Transmitter Specifications
Parameter	Symbol	Unit	Min.	Typ.	Max.
Input Differential Impedance	Rin	–	90	100	110
Differential Input Voltage swing, per lane	Vin	–	300	–	1100
Transmit Disable Voltage	VD	–	2.0	–	VCC+0.3
Transmit Enable Voltage	Ven	–	Vee	–	Vee+0.8

Receiver Specifications
Parameter	Symbol	Unit	Min.	Typ.	Max.
Differential Output Swing, per lane	Vout	mV	300	–	900
Bit Error Rate@53.125 Gbps	BER	–	–	–	2.4E-4
Output Differential Impedance	Rout	Ω	90	100	110
Loss of Signal –Asserted	–	V	2.0	–	VCC+0.3
Loss of Signal –Negated	–	V	Vee	–	Vee+0.8

Transceiver Electrical Pad Layout（QSFP- DD end）

QSFP- DD to 8*SFP56 Pin Function Definition
Pin	Symbol	Name/Description	Note
1	GND	Ground	1
2	Tx2 n	Transmitter Inverted Data Input	–
3	Tx2 p	Transmitter Non- Inverted Data Output	–
4	GND	Ground	1
5	Tx4 n	Transmitter Inverted Data Input	–
6	Tx4p	Transmitter Non- Inverted Data Input	–
7	GND	Ground	1
8	ModSelL	Module Select	–
9	ResetL	Module Reset	–
10	VccRx	+ 3.3 V Power Supply Receiver	2
11	SCL	2 – wire serial interface clock	–
12	SDA	2 – wire serial interface data	–
13	GND	Ground	1
14	Rx3p	Receiver Non- Inverted Data Output	–
15	Rx3n	Receiver Inverted Data Output	–
16	GND	Ground	1
17	Rx1p	Receiver Non- Inverted Data Output	–
18	Rx1n	Receiver Inverted Data Output	–
19	GND	Ground	1
20	GND	Ground	1
21	Rx2n	Receiver Inverted Data Output	–
22	Rx2p	Receiver Non- Inverted Data Output	–
23	GND	Ground	1
24	Rx4n	Receiver Inverted Data Output	–
25	Rx4p	Receiver Non- Inverted Data Output	–
26	GND	Ground	1
27	Mod PrsL	Module Present	–
28	IntL	Interrupt	–
29	VccTx	+ 3.3 V Power supply transmitter	2
30	Vcc1	+ 3.3V Power supply	2
31	InitMode	Initialization mode; In legacy QSFP applications, the InitMode pad is called LPMODE	–
32	GND	Ground	1
33	Tx3p	Transmitter Non- Inverted Data Input	–
34	Tx3 n	Transmitter Inverted Data Input	–
35	GND	Ground	1
36	Tx1 p	Transmitter Non- Inverted Data Input	–
37	Tx1 n	Transmitter Inverted Data Input	–
38	GND	Ground	1
39	GND	Ground	1
40	Tx6 n	Transmitter Inverted Data Input	–
41	Tx6p	Transmitter Non- Inverted Data Input	–
42	GND	Ground	1
43	Tx8 n	Transmitter Inverted Data Input	–
44	Tx8p	Transmitter Non- Inverted Data Input	–
45	GND	Ground	1
46	Reserved	For future use	3
47	VS1	Module Vendor Specific 1	3
48	VccRx1	3.3 V Power Supply Receiver	2
49	VS2	Module Vendor Specific 2	3
50	VS3	Module Vendor Specific 3	3
51	GND	Ground	1
52	Rx7p	Receiver Non- Inverted Data Output	–
53	Rx7n	Receiver Inverted Data Output	–
54	GND	Ground	1
55	Rx5p	Receiver Non- Inverted Data Output	–
56	Rx5n	Receiver Inverted Data Output	–
57	GND	Ground	1
58	GND	Ground	1
59	Rx6n	Receiver Inverted Data Output	–
60	Rx6p	Receiver Non- Inverted Data Output	–
61	GND	Ground	1
62	Rx8n	Receiver Inverted Data Output	–
63	Rx8p	Receiver Non- Inverted Data Output	–
64	GND	Ground	1
65	NC	No Connect	3
66	Reseved	For future use	3
67	VccTx1	3.3 V Power Supply	2
68	Vcc2	3.3 V Power Supply	2
69	Reseved	For future use	3
70	GND	Ground	1
71	Tx7p	Transmitter Non- Inverted Data Input	–
72	Tx7 n	Transmitter Inverted Data Input	–
73	GND	Ground	1
74	Tx5p	Transmitter Non- Inverted Data Input	–
75	Tx5 n	Transmitter Inverted Data Input	–
76	GND	Ground	1
Notes: 1. QSFP- DD TO 4 QSFP uses common ground ( GND) for all signals and supply ( power) . All are common within the QSFP- DD TO 4 QSFP module and all module voltages are referenced to this potential unless otherwise noted. Connect these directly to the host board signal- common ground plane.2. VccRx, VccRx1 , Vcc1 , Vcc2 , VccTx and VccTx1 shall be applied concurrently. Requirements defined for the host side of the Host Card Edge Connector are listed in Table 6. VccRx, VccRx1 , Vcc1 , Vcc2 , VccTx and VccTx1 may be internally connected within the module in any combination. The connector Vcc pins are each rated for a maximum current of 1000 mA. 3. All Vendor Specific, Reserved and No Connect pins may be terminated with 5 0 ohms to ground on the host. Pad 6 5 ( No Connect)shall be left unconnected within the module. Vendor specific and Reserved pads shall have an impedance to GND that is greater than 10 kOhms and less than 100 pF. 4. Plug Sequence specifies the mating sequence of the host connector and module. The sequence is 1 A, 2 A, 3 A, 1 B, 2 B, 3 B. (see Figure 2 for pad locations) Contact sequence A will make, then break contact with additional QSFP- DD TO 2 QSFP pads.Sequence 1 A, 1B will then occur simultaneously, followed by 2 A, 2 B, followed by 3 A, 3 B.

Transceiver Electrical Pad Layout（SFP56 end）

Pin Definition（SFP56 end）
Pin	Symbol	Name/Description
1	VEET	Transmitter Ground
2	Tx_FAULT	Transmitter Fault
3	Tx_DIS	Transmitter Disable. Laser out put disabled on high or open
4	SDA	2-wire Serial Inter face Data Line
5	SCL	2-wire Serial Inter face Clock Line
6	MOD_ABS	Module Absent. Grounded with in the module
7	RS0	Rate Select 0
8	RX_LOS	Loss of Signal in dication. Logic 0 indicates normal operation
9	RS1	Rate Select 1
10	VEER	Receiver Ground
11	VEER	Receiver Ground
12	RD-	Receiver Inverted DATA out. AC Coupled
13	RD+	Receiver DATA out. AC Coupled
14	VEER	Receiver Ground
15	VCCR	Receiver Power Supply
16	VCCT	Transmitter Power Supply
17	VEET	Transmitter Ground
18	TD+	Transmitter DATA in. AC Coupled
19	TD-	Transmitter Inverted DATA in. AC Coupled
20	VEET	Transmitter Ground

PRODUCT CERTIFICATION

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400G QSFP-DD to 8×50G SFP56 Active Optical Cable(AOC)最先出现在www.philisun.com。

400G QSFP-DD to 4×100G QSFP28 Active Optical Cable(AOC)

philisun001 — Fri, 06 Mar 2026 09:59:16 +0000

SPECIFICATIONS
Cable End Connector A	QSFP-DD	Cable End Connector B	4×QSFP28
Jumper Type	Active Optical Breakout Cable	Data Rate	400G
Aggregate Bit Rate	425Gbps	Lane Bit Rate	53.125Gbps
Number of Channels	8	Single Channel Rate	50G
Array Transmitter	VSCEL	Array Receiver	PIN
Minimum Bend Radius	30mm	Factory Brand	PHILISUN
Center(Operating) Wavelength	850nm	Bit Error Rate	2.4E-4
Fiber Type	OM3 MMF MAX 70m/OM4 MMF MAX 100m	Cable Colour	Aqua
Cable Material	LSZH/OFNP	Cable Length Selection	1-100meter
Safety Certification	TUV/UL/FDA	Application Scenarios	400 Gigabit Ethernet (400GbE)
Protocols	SFF-8679/SFF-8661/QSFP-DD-CMIS-Rev4.0/SFF-8636/IEEE 802.3cd	DDMI(Commercial)	YES
Supply Voltage	3.3V	Power Dissipation	QSFP-DD:<12.0W QSFP56:<3.5W
Operating Temperature	0 to 70℃ (32 to 158℉)	Storage Temperature	-20 to 85℃ (-4 to 185℉)

PRODUCT PRESENTATION

This 400G 400G QSFP-DD to 4x100G QSFP28 Active Optical Cable (AOC) is a powerful breakout cable, converting a single 400G QSFP-DD port into four independent 100G QSFP28 channels. It is engineered for comprehensive compatibility, complying with standards including QSFP-DD MSA, CMIS 4.0, and multiple IEEE specifications. This versatile AOC is optimized for essential data center links, enabling high-throughput connections for both Switch to Switch and between Switch to GPU systems, offering a flexible and cost-effective high-density solution.

AOC SERIES PRODUCTS

PRODUCTION & TESTING EQUIPMENT

PERFORMANCE PARAMETER

General Product Characteristics
Parameter	Value	Unit	Comments
Module Form Factor	QSFP-DD and QSFP	–	Module Form Factor
Number of Lanes	8TXand8RX	–	–
Maximum Aggregate Data Rate	425(QSFP-DD) 103. 1(QSFP)	Gb/s	–
Maximum Data Rate per Lane	53.125	Gb/s	–
Standard Cable Lengths	3, 5, 7, 10, 15, 20	meters	Other lengths maybe available upon request
Electrical Interface and Pin- out	76-pin edge connector (QSFP-DD) 38-pin edge connector(QSFP28)	–	Pin-out as defined byQSFP-DD Rev 4.0 & QSFPSFF8679
Maximum Power Consumption per End	12(QSFP-DD)and 3.5(QSFP28)	Watts	Varies with output voltageswing and pre-emphasis settings

Force Specification
Parameter	Min.	Max.	Unit.	Comments.
Module Insertion	–	90(QSFP-DD) 40(QSFP28)	Newton	–
ModuleExtraction	–	50(QSFP-DD) 30(QSFP28)	Newton	–
Module Retention	90(QSFP-DD) 90(QSFP28)	–	Newton	–
Insertion and removalcycles	50	–	Cycle	–

Mechanical Specification
Parameter	Symbol	Min.	Typ.	Max.	Unit.	Ref.
Maximum Supply Voltage	Vcc	-0.5	–	3.6	V	–
Storage Temperature	Tsto	-40	–	85	℃	–
Case Operating Temperature	Top_1	0	–	60	℃	① 、②
Case Operating Temperature	Top_2	0	–	70	℃	②
Relative Humidity	RH	5	–	85	%	–
1.DDMI temperature reading is measured by the position of Top_1 2.Case operating temperature definition:

Recommended Operating Environment
Parameter	Symbol	Min.	Typ.	Max.	Unit.	Ref.
Supply Voltage	Vcc	3.14	–	3.46	V	–
Power Consumption	PCon	–	–	12(QSFP-DD) 3.5(QSFP28)	W	–
Optical Data Rate (PAM4)	BR	–	26.5625	–	GBd	①
Electrical Data Rate for QSFP28 (NRZ)	BR	–	25.78125	–	Gb/s	–
Center wavelength	λc	840	–	860	nm	②
Pre-FEC Bit Error Rate (PAM4)	–	–	–	2.4×10-4	–	③
Pre-FEC Bit Error Rate (NRZ)	–	–	–	5×10-5	–	–
Parameter	Symbol	Min.	Typ.	Max.	Unit.	Ref.
Post-FEC Bit Error Rate	–	–	–	1×10-12	–	–
Beam divergence angle	–	–	23	–	˚	–
Number of Lanes	–	–	8	–	–	–
Management Interface	–	Serial, I2C-based,maximumfrequeny		400kHz	–	④
Logic Input Voltage High	Vih	2	–	Vcc+0.3	V	–
Logic Input Voltage Low	Vil	-0.3	–	0.8	V	–
① Single lane ② PRBS31Q test pattern is used. ③ As defined by IEEE Std. 802.3bs ™/D3.5 ④ As defined by SFF-8636

Electrical Characteristics
Parameter	Symbol	Min.	Typ.	Max.	Unit.	Ref.
TransmitteratTP1a
AC common-mode output voltage (RMS)	–	–	–	17.5	mV
Differential peak-to-peak output voltage (Transmitterdisabled)	–	–	–	35	mV
Differential peak-to-peak output voltage (Transmitterenabled)	–	–	–	880	mV
Eye symmetry mask width	ESMW	–	0.22	–	UI
Eyeheight,differential	EH	32	–	–	mV
Differentia loutput returnloss	–	SeeEq.1	–	–	–
Common to differential mode conversion return loss	–	SeeEq. 2	–	–	–
Differential termination mismatch	–	10	–	–	%
Transition time (20%to80%)	Tr,Tf	–	–	10	ps
Receiverat TP4
Far-end Eye height,differential	–	30	–	–	mV
Far-end pre-cursorISIratio	–	-4.5		2.5	%
Differential output return loss	–	SeeEq.1	–	–	–
Common to differential mode conversion return loss	–	SeeEq. 2	–	–	–
Differential ermination mismatch	–	10	–	–	%
Parameter	Symbol	Min.	Typ.	Max.	Unit.	Ref.
Transitiontime(20%to80%)	Tr,Tf	10	–	–	ps	–
DCcommon modevoltage	–	-350	–	2850	mV	–

TransmitteratTP1a
Differential Data Output Voltage Peak to Peak Swing	Vin,pp	–	–	900	mV	–
Differential Input Return Loss	SDD22	Per OIF CEI-28G-VSR and CAUI-4 Requirements			dB	–
Common Mode to Differential Conversion and Differential to Common Mode Conversion	SDD22 SCD22				dB	–
Common Mode Return Loss	SCC22				dB	–
Transition Time,20% to 80%	Tr,Tf	10	–	–	ps	–
Common Mode Voltage	Vcm	-0.3	–	2.8	V	–
Receiverat TP4
Differential Data Output Voltage Peak to Peak Swing	Vopp			900	mV	–
Differential Output Impedance	Zos	90	100	110	Ohms	–
Common Mode Voltage	Vcm	-0.35		2.85	V	①
Differential Output Return Loss	SDD22	Per OIF CEI-28G-VSR and Requirements		CAUI-4	dB	–
Common Mode to Differential Conversion and Differential to Common Mode Conversion	SDD22 SCD22			–	–	–
Common Mode Return Loss	SCC22	–	–	-2.00	dB	②
Transition Time,20% to 80%	Tr,Tf	10	–	–	ps	–
Eye Width @1E-15 Probability	EW15	0.57	–	–	UI	–
Eye Height@1E-15P robability	EH15	228	–	–	mV	–
① Vcm is generated by the host. Specification includes effects of ground offset voltage. ② From 250MHz to 30GHz

Pin Descriptions (compliant QSFP-DD Rev. 4.0)

PIN	Symbol	Description	Ref.
1	GND	Ground	®
2	TX2n	Transmitter Inverted Data Input	–
3	TX2p	Transmitter Non-Inverted Data Input	–
4	GND	Ground	®
5	TX4n	Transmitter Inverted Data Input	–
6	TX4p	Transmitter Non-Inverted Data Input	–
7	GND	Ground	®
8	ModSelL	Module Select	–
9	ResetL	Module Reset	–
10	VccRX	+3.3VPower Supply Receiver	®
11	SCL	2-wire serial interface clock	–
12	SDA	2-wire serial interface data	–
13	GND	Ground	®
14	RX3p	ReceiverNon-Inverted Data Output	–
15	RX3n	Receiver Inverted Data Output	–
16	GND	Ground	®
17	RX1p	Receiver Non-Inverted Data Output	–
18	RX1n	Receiver Inverted Data Output	–
19	GND	Ground	®
20	GND	Ground	®
21	RX2n	Receiver Inverted Data Output	–
22	RX2p	Receiver Non-Inverted Data Output	–
23	GND	Ground	®
24	RX4n	Receiver Inverted Data Output	–
25	RX4p	Receiver Non-Inverted Data Output	–
26	GND	Ground	®
27	ModPrsL	Module Present	–
28	IntL	Interrupt	–
29	VccTX	+3.3V Power supply transmitter	®
30	Vcc1	“+3.3V Powersupply	®
31	LPMode	Initializationmode;Inlegacy QSFP applications, the InitMode pad is called LPMODE	–
32	GND	Ground	®
33	TX3p	Transmitter Non-Inverted Data Input	–
34	TX3n	Transmitter Inverted Data Input	–
35	GND	Ground	®
36	TX1p	Transmitter Non-Inverted Data Input	–
37	TX1n	Transmitter Inverted Data Input	–
38	GND	Ground	®
39	GND	Ground	®
40	Tx6n	Transmitter Inverted Data Input	–
41	Tx6p	Transmitter Non-Inverted Data Input	–
42	GND	Ground	®
43	Tx8n	Transmitter Inverted Data Input	–
44	Tx8p	Transmitter Non-Inverted DataInput	–
45	GND	Ground	®
46	Reserved	Forfutureuse	③
47	VS1	Module Vendor Specific1	③
48	3.3VPowerSupply	2A	②
49	VS2	Module Vendor Specific2	③
50	VS3	Module Vendor Specific3	③
51	GND	Ground	®
52	Rx7p	Receiver Non-Inverted Data Output	–
53	Rx7n	Receiver Inverted Data Output	–
54	GND	Ground	®
55	Rx5p	Receiver Non-Inverted DataOutput	–
56	Rx5n	Receiver Inverted Data Output	–
57	GND	Ground	®
58	GND	Ground	®
59	Rx6n	Receiver InvertedData Output	–
60	Rx6p	Receiver Non-Inverted DataOutput	–
61	GND	Ground	®
62	Rx8n	Receiver Inverted Data Output	–
63	Rx8p	Receiver Non-Inverted DataOutput	–
64	GND	Ground	®
65	NC	No Connect	③
66	Reserved	For future use	③
67	VccTx1	3.3V Power Supply	②
68	Vcc2	3.3V Power Supply	®
69	Reserved	For Future Use	③
70	GND	Ground	®
71	Tx7p	Transmitter Non-Inverted Data Input	–
72	Tx7n	Transmitter Inverted Data Input	–
73	GND	Ground	®
74	Tx5p	Transmitter Non-Inverted Data Input	–
75	Tx5n	Transmitter Inverted Data Input	–
76	GND	Ground	®
① QSFP-DD uses common ground (GND) for all signals and supply (power). All are common within the QSFP-DD module and all module voltages are referenced to this potential unless otherwise noted. Connect these directly to the host board signal-common ground plane. ② VccRx, VccRx1, Vcc1, Vcc2, VccTx and VccTx1 shall be applied concurrently. Requirements defined for the hostside of the Host Card Edge Connector are listed in Table 4. VccRx, VccRx1, Vcc1, Vcc2, VccTx and VccTx1 may be internally connected within the module in any combination. The connector Vcc ping are each rated for a maximum current of 1000 mA. ③ All Vendor Specific, Reserved and No Connect pins may be terminated with 50ohms to grounds on the host.Pad 65 (No connect) shall be left unconnected within the module. Vendor specific and Reserved pads shall have an impedance to GND that is greater than 10k o hms and less than 100 pF. ④ Plug Sequence specifies the mating sequence of the host connector and module. The sequence is 1A, 2A, 3A,1B, 2B, 3B. Contact sequence A will make, the break contact with additional QSFP- DD pads. Sequence 1A, 1B will then occur simultaneously, followed by 2A, 2B, followed by 3A, 3B.

Pin Descriptions (compliant SFF-8679)

PIN	Symbol	Description	Ref.
1	GND	Ground	–
2	TX2n	Transmitter Inverted Data Input	–
3	TX2p	TransmitterNon-Inverted Data Input	–
4	GND	Ground	®
5	TX4n	Transmitter Inverted Data Input	–
6	TX4p	Transmitter Non-Inverted DataInput	–
7	GND	Ground	®
8	ModSelL	Module Select	®
9	ResetL	Module Reset	®
10	VccRX	+3.3V Receiver Power Supply Receiver	–
11	SCL	2-wire Serial Interface Clock	®
12	SDA	2-wire Serial Interface Data	®
13	GND	Ground	®
14	RX3p	Receiver Non-Inverted Data Output	–
15	RX3n	Receiver Inverted Data Output	–
16	GND	Ground	®
17	RX1p	Receiver Non-Inverted DataOutput	–
18	RX1n	Receiver Inverted Data Output	–
19	GND	Ground	®
20	GND	Ground	®
21	RX2n	Receiver Inverted Data Output	–
22	RX2p	Receiver Non-Inverted Data Output	–
23	GND	Ground	®
24	RX4n	Receiver Inverted Data Output	–
25	RX4p	Receiver Non-Inverted DataOutput	–
26	GND	Ground	®
27	ModPrsL	Module Present,internal pulled down to GND	–
28	IntL	Interrupt output,should be pulled up on host board	–
29	VccTX	+3.3V Transmitter Power Supply	–
30	Vcc1	+3.3V Power Supply	–
31	LPMode	LowPowerMode	®
32	GND	Ground	–
33	TX3p	Transmitter Non-Inverted Data Input	–
34	TX3n	Transmitter Inverted Data Input	–
35	GND	Ground	–
36	TX1p	Transmitter Non-Inverted Data Input	–
37	TX1n	Transmitter Inverted Data Input	–
38	GND	Ground	®
① GND is the symbol for signal and supply (power) common for the module. All are common within the module and all module voltages are reference to this potential unless otherwise noted. Module circuit ground is isolated from module chassis ground within the module. ② Open collector, should be pulled up with 4.7~10K o hms on the host board to a voltage between 3.15V and 3.6V.

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400G QSFP-DD to 4×100G QSFP28 Active Optical Cable(AOC)最先出现在www.philisun.com。

400G QSFP-DD to 4×100G QSFP56 Active Optical Cable(AOC)

philisun001 — Fri, 06 Mar 2026 06:31:31 +0000

SPECIFICATIONS
Cable End Connector A	QSFP-DD	Cable End Connector B	4×QSFP56
Jumper Type	Active Optical Breakout Cable	Data Rate	400G
Aggregate Bit Rate	425Gbps	Lane Bit Rate	53.125Gbps
Number of Channels	8	Single Channel Rate	50G
Array Transmitter	VSCEL	Array Receiver	PIN
Minimum Bend Radius	30mm	Factory Brand	PHILISUN
Center(Operating) Wavelength	850nm	Bit Error Rate	2.4E-4
Fiber Type	OM3 MMF MAX 70m/OM4 MMF MAX 100m	Cable Colour	Aqua
Cable Material	LSZH/OFNP	Cable Length Selection	1-100meter
Safety Certification	TUV/UL/FDA	Application Scenarios	400 Gigabit Ethernet (400GbE)
Protocols	E 802.3cd/OIF-CEI-04.0/QSFP-DD MSA/QSFP-DD-CMIS-Rev4.0/SFF-8024 Rev4.6/IEEE 802.3bs Annex120E/ SFF-8679 Rev1.8/SFF-8665 Rev1.9	DDMI(Commercial)	YES
Supply Voltage	3.3V	Power Dissipation	QSFP-DD:<12.0W QSFP56:<3.5W
Operating Temperature	0 to 70℃ (32 to 158℉)	Storage Temperature	-20 to 85℃ (-4 to 185℉)

PRODUCT PRESENTATION

This 400G QSFP-DD to 4x100G QSFP56 Active Optical Cable (AOC) is a high-density, four-way breakout solution, ideal for maximizing port density by segmenting a single 400G link into four separate 100G channels. It is engineered for seamless integration, complying with major standards including IEEE 802.3cd, QSFP-DD MSA, and SFF-8679. This versatile AOC facilitates high-throughput connectivity for essential data center architectures, supporting links from Switch to Switch and high-speed data transfer between Switch to GPU nodes in HPC clusters. It is a cost-effective alternative to multiple short-reach transceivers.

AOC SERIES PRODUCTS

PRODUCTION & TESTING EQUIPMENT

PERFORMANCE PARAMETER

Absolute Maximum Ratings
Parameter	Symbol	Unit	Min.	Max.
Storage Temperature Range	TS	℃	-20	+85
Relative Humidity	RH	%	0	85
Power Supply Voltage	VCC	V	-0.5	+4.0

Recommended Operating Conditions
Parameter	Symbol	Unit	Min.	Typ.	Max.
Operating Case Temperature Range	Tca	℃	0	–	70
Power Supply Voltage	VCC	V	3.135	3.3	3.465
Bit Rate (per Channel )	BR	GBd	–	26.5625	–
Humidity	Rh	%	5	–	85
Fiber Bend Radius	Rb	cm	3	–	–

Electric Specifications (400G QSFP-DD and 100G QSFP56)
Parameter	Symbol	Unit	Min.	Typ.	Max.	Notes
Supply Voltage	VCC VCC3.3-Tx VCC3.3-Rx	V	3.135	3.3	3.465	–
Power Consumption ( QSFP-DD)	Pc	W	–	–	11	Per-end
Power Consumption ( QSFP56)					5
Transceiver Power-on Initialize Time	–	ms	–	–	2000	–
Transmitter
Differential Peak-to-peak input Voltage Tolerance	–	mV	900	–	–	–
Differential Termination Mismatch	–	–	–	–	10%	–
Differential Input Return Loss(SDD11)	–	dB	–	–	See CEI-56G-VSR	–
Common-mode to Differential Conversion and Differential to Common-mode Conversion(SCD11, SDC11)	–	dB	–	–	See CEI-56G-VSR	–
Receiver
Differential Peak-to-peak Output Voltage	–	mV	–	–	900	–
DC Common Mode Voltage	Vcm	mV	-0.35	–	2.85	–
AC Common Mode Noise, RMS	–	mV	–	–	17.5	–
Differential Termination Mismatch	–	%	–	–	10	–
Differential Output Return Loss(SDD22)	–	dB	–	–	See CEI-56G-VSR	–
Common-mode to Differential Conversion and Differential to Common-mode Conversion(SCD22, SDC22)	–	dB	–	–	See CEI-56G-VSR	–
IIC communication
IIC Clock Frequency (QSFP-DD)	–	KHZ	–	400	1000	–
IIC Clock Frequency (QSFP56)	–		–	100		–
Clock Stretching	–	us	–	–	500	–
Data Hold Time	–	ns	–	–	–	–

QSFP-DD PIN DESCRIPTIONS

PIN	Logic	Symbol	Description	Note
1	–	GND	Ground	1
2	CML-I	Tx2n	Transmitter Inverted Data Input	–
3	CML-I	Tx2p	Transmitter Non-Inverted Data Output	–
4	–	GND	Ground	1
5	CML-I	Tx4n	Transmitter Inverted Data Input	–
6	CML-I	Tx4p	Transmitter Non-Inverted Data Output	–
7	–	GND	Ground	1
8	LVTTL-I	ModSelL	Module Select	–
9	LVTTL-I	ResetL	Module Reset	–
10	–	VccRx	3.3V Power Supply Receiver	2
11	LVCOMS-I/O	SCL	2-Wire Serial Interface Clock	–
12	LVCOMS-I/O	SDA	2-Wire Serial Interface Data	–
13	–	GND	Ground	1
14	CML-O	Rx3p	Receiver Non-Inverted Data Output	–
15	CML-O	Rx3n	Receiver Inverted Data Output	–
16	–	GND	Ground	1
17	CML-O	Rx1p	Receiver Non-Inverted Data Output	–
18	CML-O	Rx1n	Receiver Inverted Data Output	–
19	–	GND	Ground	1
20	–	GND	Ground	1
21	CML-O	Rx2n	Receiver Inverted Data Output	–
22	CML-O	Rx2p	Receiver Non-Inverted Data Output	–
23	–	GND	Ground	1
24	CML-O	Rx4n	Receiver Inverted Data Output	–
25	CML-O	Rx4p	Receiver Non-Inverted Data Output	–
26	–	GND	Ground	1
27	LVTTL-O	ModPrsL	Module Present	–
28	LVTTL-O	IntL	Interrupt	–
29	–	VCCTx	3.3 V Power Supply transmitter	2
30	–	VCC1	3.3 V Power Supply	2
31	LVTTL-I	InitMode	Initialization mode; In legacy QSFP applications, the IntiModepad is called LPMode	–
32	–	GND	Ground	1
33	CML-I	Tx3p	Transmitter Inverted Data Input	–
34	CML-I	Tx3n	Transmitter Non-Inverted Data Output	–
35	–	GND	Ground	1
36	CML-I	Tx1p	Transmitter Inverted Data Input	–
37	CML-I	Tx1n	Transmitter Non-Inverted Data Output	–
40	CML-I	Tx6n	Transmitter Inverted Data Input	–
41	CML-I	Tx6p	Transmitter Non-Inverted Data Output	–
42	–	GND	Ground	1
43	CML-I	Tx8n	Transmitter Inverted Data Input	–
44	CML-I	Tx8p	Transmitter Non-Inverted Data Output	–
45	–	GND	Ground	1
46	–	Reserved	For Future Use	3
47	–	VS1	Module Vendor Specific 1	3
48	–	VCCRx1	3.3V Power Supply Receiver	2
49	–	VS2	Module Vendor Specific 2	3
50	–	VS3	Module Vendor Specific 3	3
51	–	GND	Ground	1
52	CML-0	Rx7p	Receiver Non-Inverted Data Output	–
53	CML-0	Rx7n	Receiver Inverted Data Output	–
54	–	GND	Ground	1
55	CML-0	Rx5p	Receiver Non-Inverted Data Output	–
56	CML-0	Rx5n	Receiver Inverted Data Output	–
57	–	GND	Ground	1
58	–	GND	Ground	1
61	–	GND	Ground	1
62	CML-0	Rx8n	Receiver Inverted Data Output	–
63	CML-0	Rx8p	Receiver Non-Inverted Data Output	–
64	–	GND	Ground	1
65	–	NC	Not Connect	3
66	–	Reserved	For Future Use	3
67	–	VCCTx 1	3.3 V Power Supply Transmitter	2
68	–	VCC2	3.3 V Power Supply	2
69	–	Reserved	For Future Use	3
70	–	GND	Ground	1
71	CML-I	Tx7p	Transmitter Inverted Data Input	–
72	CML-I	Tx7n	Transmitter Non-Inverted Data Output	–
73	–	GND	Ground	1
74	CML-I	Tx5p	Transmitter Inverted Data Input	–
75	CML-I	Tx5n	Transmitter Non-Inverted Data Output	–
76	–	GND	Ground	1
Notes: 1. QSFP-DD uses common ground (GND) for all signals and supply (power). All the common within the QSFP-DD module and all module voltages are referenced to this potential unless otherwise noted. Connected theses directly to the host board signal common ground plane.2. VCCRx, VCCRx1, VCC1, VCC2, VCCTx, and VCCTx1 shall be applied concurrently. Requirements defined for the host side of the Host Card Edge Connector are listed in Table 4. VCCRx, VCCRx1, VCC 1, VCC2, VCCTx, and VCCTx1 may be internally connected within the module in anycombination. The connector Vcc pins are each rated for a maximum current of 1000mA. 3. All Vendor Specific, Reserved and No Connect pins may be terminated with 50 ohms to ground on the host. Pad 65 (No Connect) shall be left unconnected within the module. Vendor Specific and Reserved pads shall have an impedance to GND that is greater than 10 kOhms and less than 100pF.

QSFP56 PIN DESCRIPTIONS

PIN	Logic	Symbol	Description	Note
1	–	GND	Ground	1
2	CML-I	Tx2n	Transmitter Inverted Data Input	–
3	CML-I	Tx2p	Transmitter Non-Inverted Data Output	–
4	–	GND	Ground	1
5	CML-I	NA	NAt	–
6	CML-I	NA	NA	–
7	–	GND	Ground	1
8	LVTTL-I	ModSelL	Module Select	–
9	LVTTL-I	ResetL	Module Reset	–
10	–	VCCRx	3.3V Power Supply Receiver	2
11	LVCOMS-I/O	SCL	2-Wire Serial Interface Clock	–
12	LVCOMS-I/O	SDA	2-Wire Serial Interface Data	–
13	–	GND	Ground	1
14	CML-O	NA	NA	–
15	CML-O	NA	NA	–
16	–	GND	Ground	1
17	CML-O	Rx1p	Receiver Non-Inverted Data Output	–
18	CML-O	Rx1n	Receiver Inverted Data Output	–
19	–	GND	Ground	1
20	–	GND	Ground	1
21	CML-O	Rx2n	Receiver Inverted Data Output	–
22	CML-O	Rx2p	Receiver Non-Inverted Data Output	–
23	–	GND	Ground	1
24	CML-O	NA	NA	–
25	CML-O	NA	NA	–
26	–	GND	Ground	1
27	LVTTL-O	ModPrsL	Module Present	–
28	LVTTL-O	IntL/RxLOSL	Interrupt. Optionally configurable as RxLOSL Via the Management Interface (SFF-8636)	–
29	–	VCCTx	+3.3 V Power Supply transmitter	2
30	–	VCC1	+3.3 V Power Supply	2
31	LVTTL-I	LPMode/TxDis	Low Power Mode.Optionally Configurable as TxDis Via the Management Interface (SFF-8636).	–
32	–	GND	Ground	1
33	CML-I	NA	NA	–
34	CML-I	NA	NA	–
35	–	GND	Ground	1
36	CML-I	Tx1p	Transmitter Inverted Data Input	–
37	CML-I	Tx1n	Transmitter Non-Inverted Dataoutput	–
38	–	GND	Ground	1
Notes: 1. GND is the symbol for signal and supply (power) common for the QSFP28 module. All are common within the module and all module voltages are referenced to this potential unless otherwise noted. Connect these directly to the host board signal common ground plane. 2. VccRx, Vcc1 and VccTx are the receiving and transmission power suppliers and shall be applied concurrently. Recommended host board power supply filtering is shown in Figure 2 below. Vcc Rx, Vcc1 and Vcc Tx may be internally connected within the module in any combination. The connector pins are each rated for a maximum current of 1000mA.

PRODUCT CERTIFICATION

COMPATIBLE BRANDS

CONFIGURATION INFORMATION

The form can be filled in the actual website url.

400G QSFP-DD to 4×100G QSFP56 Active Optical Cable(AOC)最先出现在www.philisun.com。

400G QSFP-DD to 2×200G QSFP56 Active Optical Cable(AOC)

philisun001 — Fri, 06 Mar 2026 05:01:57 +0000

SPECIFICATIONS
Cable End Connector A	QSFP-DD	Cable End Connector B	2×QSFP56
Jumper Type	Active Optical Breakout Cable	Data Rate	400G
Aggregate Bit Rate	425Gbps	Lane Bit Rate	53.125Gbps
Number of Channels	8	Single Channel Rate	50G
Array Transmitter	VSCEL	Array Receiver	PIN
Minimum Bend Radius	30mm	Factory Brand	PHILISUN
Center(Operating) Wavelength	850nm	Bit Error Rate	2.4E-4
Fiber Type	OM3 MMF MAX 70m/OM4 MMF MAX 100m	Cable Colour	Aqua
Cable Material	LSZH/OFNP	Cable Length Selection	1-100meter
Safety Certification	TUV/UL/FDA	Application Scenarios	400 Gigabit Ethernet (400GbE)
Protocols	QSFP-DD MSA/QSFP-DD-CMIS-Rev4.0/SFF-8024 Rev.4.6/SFF-8679 Rev1.8/SFF-8665 Rev1.9/IEEE 802.3cd/IEEE 802.3bs Annex120E	DDMI(Commercial)	YES
Supply Voltage	3.3V	Power Dissipation	QSFP-DD:<11.0W QSFP56:<5.0W
Operating Temperature	0 to 70℃ (32 to 158℉)	Storage Temperature	-20 to 85℃ (-4 to 185℉)

PRODUCT PRESENTATION

The PHILISUN 400G QSFP-DD to 2x200G QSFP56 Active Optical Cable (AOC) is a high-speed breakout solution designed for network segmentation, converting a single 400G QSFP-DD port into two independent 200G QSFP56 channels. It ensures reliable and scalable performance, complying with key standards such as IEEE 802.3, QSFP-DD MSA, and CMIS 4.0. This AOC is optimized for crucial links, including connecting Switch to Switch and providing high-throughput data paths from Switch to GPU in HPC environments. Its low power and flexibility simplify deployment in large-scale data centers.

AOC SERIES PRODUCTS

PRODUCTION & TESTING EQUIPMENT

PERFORMANCE PARAMETER

Absolute Maximum Ratings
Parameter	Symbol	Min.	Max.	Unit	Notes
Storage Temperature Range	TS	-20	85	ºC	–
Supply Voltage	VCC	-0.5	4.0	V	–
Operating Relative Humidity	RH	0	85	%	–

Recommended Operating Conditions
Parameter	Symbol	Min.	Typical	Max.	Unit	Notes
Operating Case Temperature	TOPR	0	–	70	ºC	–
Power Supply Voltage	VCC	3.135	3.3	3.465	V	–
Bit Rate(per Channel)	BR	–	26.5625	–	GBd	–
Humidity	RH	5	–	85	%	–
Fiber Bend Radius	RB	3	–	–	cm	–

Electrical Specifications
Parameter	Symbol	Units	Min.	Typ.	Max.	Notes
Supply Voltage	VCC VCC3.3Tx VCC3.3-Rx	V	3.135	3.3	3.465	–
Power Consumption(QSFP-DD)	Pc	W	–	11	–	Per-end
Power Consumption(QSFP56)	Pc	W	–	5	–	Per-end
Transceiver Power-on Initialize Time	–	ms	–	–	2000	–
Transmitter
Differential Peak-to-peak Input Voltage Tolerance	–	mV	900	–	–	–
Differential Termination Mismatch	–	–	–	–	10%	–
Differential Input Return Loss(SDD11)	–	dB	–	–	See CEI-56G -VSR	–
Common-mode to Differential Conversion and Differential to Common-mode Conversion(SCD11, SDC11)	–	dB	–	–	See CEI-56G -VSR	–
Receiver
Differential Peak-to-peak Output Voltage	–	mV	–	–	900	–
DC Common Mode Voltage	Vcm	mV	-350	–	2850	–
AC Common Mode Noise, RMS	–	mV	–	–	17.5	–
Differential Termination Mismatch	–	%	–	–	10	–
Differential Output Return Loss(SDD22)	–	dB	–	–	See CEI-56G -VSR	–
Common-mode to Differential Conversion and Differential to Common-mode Conversion(SCD22, SDC22)	–	dB	–	–	See CEI-56G -VSR	–
Parameter	Symbol	Units	Min.	Typ.	Max.	Notes
IIC Communication
IIC Clock Frequency(QSFP-DD)	–	KHZ	–	400	1000	–
IIC Clock Frequency(QSFP56)	–	KHZ	–	100	1000	–
Clock Stretching	–	us	–	–	500	–

QSFP-DD PIN DESCRIPTIONS

Pin	Logic	Symbol	Description	Note
1	–	GND	Ground	1
2	CML-I	Tx2n	Transmitter Inverted Data Input	–
3	CML-I	Tx2p	Transmitter Non-Inverted Data Input	–
4	–	GND	Ground	1
5	CML-I	Tx4n	Transmitter Inverted Data Input	–
6	CML-I	Tx4p	Transmitter Non-Inverted Data Input	–
7	–	GND	Ground	1
8	LVTTL-I	ModSelL	Module Select	–
9	LVTTL-I	ResetL	Module Reset	–
10	–	VccRx	+3.3V Power Supply Receiver	2
11	LVCOMS-I/O	SCL	2-wire Serial Interface Clock	–
12	LVCOMS-I/O	SDA	2-wire Serial Interface Data	–
13	–	GND	Ground	1
14	CML-O	Rx3p	Receiver Non-Inverted Data Output	–
15	CML-O	Rx3n	Receiver Inverted Data Output	–
16	–	GND	Ground	1
17	CML-O	GND	Ground	–
18	CML-O	Rx1p	Receiver Non-Inverted Data Output	–
19	–	GND	Ground	1
20	–	GND	Ground	1
21	CML-O	Rx2n	Receiver Inverted Data Output	–
22	CML-O	Rx2p	Receiver Non-Inverted Data Output	–
23	–	GND	Ground	1
24	CML-O	Rx4n	Receiver Inverted Data Output	–
25	CML-O	Rx4p	Receiver Non-Inverted Data Output	–
26	–	GND	Ground	–
27	LVTTL-O	ModPrsL	Module Present	–
28	LVTTL-O	IntL	Interrupt	–
29	–	VCCTx	+3.3 V Power Supply Transmitter	2
30	–	VCC 1	+3.3 V Power Supply	2
31	LVTTL-I	InitMode	Initialization Mode; In Legacy QSFP Applications, the IntiMode Pad Is Called LPMode	–
32	–	GND	Ground	1
33	CML-I	Tx3p	Transmitter Inverted Data Input	–
34	CML-I	Tx3n	Transmitter Non-Inverted Data Output	–
35	–	GND	Ground	1
36	CML-I	Tx1p	Transmitter Inverted Data Input	–
37	CML-I	Tx1n	Transmitter Non-Inverted Data Output	–
38	–	GND	Ground	1
39	–	GND	Ground	1
40	CML-I	Tx6n	Transmitter Inverted Data Input	–
41	CML-I	Tx6p	Transmitter Non-Inverted Data Output	–
42	–	GND	Ground	1
43	CML-I	Tx8n	Transmitter Inverted Data Input	–
44	CML-I	Tx8p	Transmitter Non-Inverted Data Output	–
45	–	GND	Ground	1
46	–	Reserved	For Future Use	3
47	–	VS1	Module Vendor Specific 1	3
48	–	VCCRxx1	+3.3V Power Supply Receiver	2
49	–	VS2	Module Vendor Specific 2	3
50	–	VS3	Module Vendor Specific 3	3
51	–	GND	Ground	1
52	CML-O	Rx7p	Receiver Non-Inverted Data Output	–
53	CML-O	Rx7n	Receiver Inverted Data Output	–
54	–	GND	Ground	1
55	CML-O	Rx5p	Receiver Non-Inverted Data Output	–
56	CML-O	Rx5n	Receiver Inverted Data Output	–
57	–	GND	Ground	1
58	–	GND	Ground	1
59	CML-O	Rx6n	Receiver Inverted Data Output	–
60	CML-O	Rx6p	Receiver Non-Inverted Data Output	–
61	–	GND	Ground	1
62	CML-O	Rx8n	Receiver Inverted Data Output	–
63	CML-O	Rx8p	Receiver Non-Inverted Data Output	–
64	–	GND	Ground	1
65	–	NC	Not Connect	3
66	–	Reserved	For Future Use	3
67	–	VCCTx 1	+3.3 V Power Supply Transmitter	2
69	–	Reserved	For Future Use	3
70	–	GND	Ground	1
71	CML-I	Tx7p	Transmitter Inverted Data Input	–
72	CML-I	Tx7n	Transmitter Non-Inverted Data Output	–
73	–	GND	Ground	1
74	CML-I	Tx5p	Transmitter Inverted Data Input	–
75	CML-I	Tx5n	Transmitter Non-Inverted Data Output	–
76	–	GND	Ground	1
Note 1. QSFP-DD uses common ground (GND) for all signals and supply (power). All the common within the QSFP-DD module and all module voltages are referenced to this potential unless otherwise noted. Connected theses directly to the host board signal common ground plane. Note 2. VCCRx, VCCRx1, VCC1, VCC2, VCCTx, and VCCTx1 shall be applied concurrently. Requirements defined for the host side of the Host Card Edge Connector are listed in Table 4. VCCRx, VCCRx1, VCC1, VCC2, VCCTx, and VCCTx1 may be internally connected within the module in any combination. The connector Vcc pins are each rated for a maximum current of 1000mA. Note 3. All Vendor Specific, Reserved and No Connect pins may be terminated with 50 ohms to ground on the host. Pad 65 (No Connect) shall be left unconnected within the module. Vendor Specific and Reserved pads shall have an impedance to GND that is greater than 10 kOhms and less than 100pF.

QSFP56 PIN DESCRIPTIONS

Pin	Logic	Symbol	Description	Notes
1	–	GND	Ground	1
2	CML-I	Tx2n	Transmitter Inverted Data Input	–
3	CML-I	Tx2p	Transmitter Non-inverted Data Input	–
4	–	GND	Ground	1
5	CML-I	Tx4n	Transmitter Inverted Data Input	–
6	CML-I	Tx4p	Transmitter Non-Inverted Data Input	–
7	–	GND	Ground	1
8	LVTTL-I	ModSelL	Module Select	–
9	LVTTL-I	ResetL	Module Reset	–
10	–	VCC Rx	+3.3V Power Supply for Receiver	2
11	LVTTL-I/O	SCL	2-wire Serial Interface Clock	–
12	LVTTL-I/O	SDA	–	–
13	–	GND	–	1
14	CML-O	Rx3p	–	–
15	CML-O	Rx3n	–	–
16	–	GND	–	1
17	CML-O	Rx1p	–	–
18	CML-O	Rx1n	–	–
19	–	GND	–	1
20	–	GND	–	1
21	CML-O	Rx2n	–	–
22	CML-O	Rx2p	–	–
23	–	GND	–	1
24	CML-O	Rx4n	–	–
25	CML-O	Rx4p	–	–
26	–	GND	–	1
27	LVTTL-O	ModPrsL	–	–
28	LVTTL-O	IntL/RxLOSL	–	–
29	–	VCC Tx	–	2
30	–	VCC1	–	2
31	LVTTL-I	LPMode	–	–
32	–	GND	–	1
33	CML-I	Tx3p	–	–
34	CML-I	Tx3n	–	–
35	–	GND	–	1
36	CML-I	Tx1p	–	–
37	CML-I	Tx1n	–	–
38	–	GND	–	1
Note1: GND is the symbol for signal and supply (power) common for the QSFP28 module. All are common within the module and all module voltages are referenced to this potential unless otherwise noted. Connect these directly to the host board signal common ground plane. Note2: VccRx, Vcc 1 and VccTx are the receiving and transmission power suppliers and shall be applied concurrently.Recommended host board power supply filtering is shown in Figure 2 below. VccRx, Vcc 1 and VccTx may be internally connected within the module in any combination. The connector pins are each rated for a maximum current of 1000mA.

PRODUCT CERTIFICATION

COMPATIBLE BRANDS

CONFIGURATION INFORMATION

The form can be filled in the actual website url.

400G QSFP-DD to 2×200G QSFP56 Active Optical Cable(AOC)最先出现在www.philisun.com。

400G QSFP-DD to QSFP-DD Active Optical Cable (AOC)

philisun001 — Fri, 21 Nov 2025 10:33:35 +0000

SPECIFICATIONS
Cable End Connector A	QSFP-DD	Cable End Connector B	QSFP-DD
Jumper Type	Direct-Attach	Data Rate	400G
Aggregate Bit Rate	425Gbps	Lane Bit Rate	53.125Gbps
Number of Channels	8	Single Channel Rate	50G
Array Transmitter	VSCEL	Array Receiver	PIN
Minimum Bend Radius	30mm	Factory Brand	PHILISUN
Center(Operating) Wavelength	850nm	Bit Error Rate	2.4E-4
Fiber Type	OM3 MMF MAX 70m/OM4 MMF MAX 100m	Cable Colour	Aqua
Cable Material	LSZH/OFNP	Cable Length Selection	1-100meter
Safety Certification	TUV/UL/FDA	Application Scenarios	400 Gigabit Ethernet (400GbE)/8x 50G-PAM4
Protocols	IEEE 802.3cd/OIF-CEI-04.0/QSFP-DD MSA/QSFP-DD-CMIS-rev4p0	DDMI(Commercial)	YES
Supply Voltage	3.3V	Power Dissipation	<8.5W
Operating Temperature	0 to 70℃ (32 to 158℉)	Storage Temperature	-20 to 85℃ (-4 to 185℉)

PRODUCT PRESENTATION

The PHILISUN QSFP-DD(200G) Active Optical Cable is a direct-attach fiber assembly utilizing QSFP-DD connectors and the Multi-Mode Fiber (MMF) scheme. The product complies with the SFF-8665 MSA standard and is suitable for 200Gbps connections within racks and across adjacent racks. It uses OM3/OM4 Multimode Fiber. Its compact structure and fully sealed integrated optics reduce costs compared to conventional optical modules and jumpers, while significantly improving reliability and reducing maintenance. This AOC guarantees broad compatibility with major vendor platforms including Cisco, H3C, Huawei, Juniper, and Arista, and more.

AOC SERIES PRODUCTS

PRODUCTION & TESTING EQUIPMENT

PERFORMANCE PARAMETER

Absolute Maximum Ratings
Parameter	Symbol	Unit	Min	Max.
Storage Temperature Range	Ts	℃	-40	+85
Relative Humidity	RH	%	0	85
Power Supply Voltage	VCC	V	-0.3	+3.465

Recommended Operating Conditions
Parameter	Symbol	Unit	Min	Typ.	Max.
Operating Case Temperature Range	Tc	℃	0	–	70
Power Supply Voltage	VCC	V	3.135	3.3	3.465
Bit Rate(Per channel)	BR	GBd	–	26.5625	–

Electric Ports Definition
Parameter	Symbol	Unit	Min.	Typ.	Max.	Note
Supply Voltage	VCC VCC3.3-Tx VCC3.3-Rx	V	3.135	3.3	3.465	–
Power Consumption	Pc	W	–	–	8.5	–
Transceiver MgmtInitDuration Time	–	ms	–	–	2000	–
Transmitter
Differential Peak-to-Peak Input Voltage tol	–	mV	900	–	10%	–
Differential Termination Mismatch	–	V	–	–	–	–
Differential Input Return Loss(SDD11)	–	dB	–	IEEE Equation (83E-5)	–	–
Common-Mode to Differential Conversion and Differential to Common-Mode Conversion(SCD11,SDC11)	–	dB	–	IEEE Equation (83E-6)	–	–
Stressed Input Test	–	–	IEEE 120E.3.4.1	–	–	–
Vcsel Wavelength	–	nm	840	850	860	–
Vcsel Beam Divergence	–	–	–	–	25。	–
Receiver
Differential Peak-to-Peak Output Voltage	–	mV	–	–	900	–
DC Common Mode Voltage	Vcm	mV	-350	–	2850	–
Common Mode Noise, RMS	VcmAC	mV	–	–	17.5	–
Differential Termination Mismatch	–	%	–	–	10	–
Differential Output Return Loss(SDD22)	–	dB	–	IEEE Equation (83E-2)	–	–
Common-mode to Differential Conversion and Differential to Common-Mode Conversion(SCD22,SDC22)	–	dB	–	IEEE Equation (83E-3)	–	–
Near-End ESMW (Eye Symmetry Mask Width)	–	UI	–	0.265	–	–
Near-End Eye Height, Differential	–	mV	–	70	–	–
Far-End ESMW (Eye Symmetry Mask Width)	–	UI	–	0.2	–	–
Far-End Eye Height, Differential	–	mV	–	30	–	–
PD Wavelength	–	nm	840	850	860	–
IIC communication
IIC Clock Frequency	–	kHZ	/	400	1000	–
Clock Stretching	–	us	/	/	500	–

PIN DESCRIPTIONS

Electrical Pin-out Details

PIN	Logic	Symbol	Description	Note
1	–	GND	Ground	1
2	CML-I	Tx2n	Transmitter Inverted Data Input	–
3	CML-I	Tx2p	Transmitter Non-Inverted Data output	–
4	–	GND	Ground	1
5	CML-I	Tx4n	Transmitter Inverted Data Input	–
6	CML-I	Tx4p	Transmitter Non-Inverted Data output	–
7	–	GND	Ground	1
8	LVTTL-I	ModSelL	Module Select	–
9	LVTTL-I	ResetL	Module Reset	–
10	–	VccRx	+3.3V Power Supply Receiver	2
11	LVCOMS-I/O	SCL	2-Wire Serial Interface Clock	–
12	LVCOMS-I/O	SDA	2-Wire Serial Interface Data	–
13	–	GND	Ground	1
14	CML-0	Rx3p	Receiver Non-Inverted Data Output	–
15	CML-0	Rx3n	Receiver Inverted Data Output	–
16	–	GND	Ground	1
17	CML-0	Rx 1p	Receiver Non-Inverted Data Output	–
18	CML-0	Rx 1n	Receiver Inverted Data Output	–
19	–	GND	Ground	1
20	–	GND	Ground	1
21	CML-0	Rx2n	Receiver Inverted Data Output	–
22	CML-0	Rx2p	Receiver Non-Inverted Data Output	–
23	–	GND	Ground	1
24	CML-0	Rx4n	Receiver Inverted Data Output	–
25	CML-0	Rx4p	Receiver Non-Inverted Data Output	–
26	–	GND	Ground	1
27	LVTTL-0	ModPrsL	Module Present	–
28	LVTTL-0	IntL	Interrupt	–
29	–	VccTx	+3.3 V Power Supply transmitter	2
30	–	Vcc1	+3.3 V Power Supply	2
31	LVTTL-I	LPMode	Low Power mode	–
32	–	GND	Ground	1
33	CML-I	Tx3p	Transmitter Inverted Data Input	–
34	CML-I	Tx3n	Transmitter Non-Inverted Data output	–
35	–	GND	Ground	1
36	CML-I	Tx 1p	Transmitter Inverted Data Input	–
37	CML-I	Tx 1n	Transmitter Non-Inverted Data output	–
38	–	GND	Ground	1
39	–	GND	Ground	1
40	CML-I	Tx6n	Transmitter Inverted Data Input	–
41	CML-I	Tx6p	Transmitter Non-Inverted Data output	–
42	–	GND	Ground	1
43	CML-I	Tx8n	Transmitter Inverted Data Input	–
44	CML-I	Tx8p	Transmitter Non-Inverted Data output	–
45	–	GND	Ground	1
46	–	Reserved	For future use	3
47	–	VS1	Module Vendor Specific 1	3
48	–	VccRx1	+3.3V Power Supply Receiver	2
49	–	VS2	Module Vendor Specific 2	3
50	–	VS3	Module Vendor Specific 3	3
51	–	GND	Ground	1
52	CML-0	Rx7p	Receiver Non-Inverted Data Output	–
53	CML-0	Rx7n	Receiver Inverted Data Output	–
54	–	GND	Ground	1
55	CML-0	Rx5p	Receiver Non-Inverted Data Output	–
56	CML-0	Rx5n	Receiver Inverted Data Output	–
57	–	GND	Ground	1
58	–	GND	Ground	1
59	CML-0	Rx6n	Receiver Inverted Data Output	–
60	CML-0	Rx6p	Receiver Non-Inverted Data Output	–
61	–	GND	Ground	1
62	CML-0	Rx8n	Receiver Inverted Data Output	–
63	CML-0	Rx8p	Receiver Non-Inverted Data Output	–
64	–	GND	Ground	1
65	–	NC	Not Connect	3
66	–	Reserved	For future use	3
67	–	VccTx 1	+3.3 V Power Supply transmitter	2
68	–	Vcc2	+3.3 V Power Supply	2
69	–	Reserved	For future use	3
70	–	GND	Ground	1
71	CML-I	Tx7p	Transmitter Inverted Data Input	–
72	CML-I	Tx7n	Transmitter Non-Inverted Data output	–
73	–	GND	Ground	1
74	CML-I	Tx5p	Transmitter Inverted Data Input	–
75	CML-I	Tx5n	Transmitter Non-Inverted Data output	–
76	–	GND	Ground	1
Notes: 1. QSFP-DD uses common ground (GND) for all signals and supply (power). All the common within the QSFP-DD module and all module voltages are referenced to this potential unless otherwise noted. Connected theses directly to the host board signal common ground plane.2. VccRx, VccRx 1, Vcc1, Vcc2, VccTx, and VccTx 1 shall be applied concurrently. Requirements defined for the host side of the Host Card Edge Connector are listed in Table 4. VccRx, VccRx 1, Vcc1, Vcc2, VccTx, and VccTx 1 may be internally connected within the module in any combination. The connector Vcc pins are each rated for a maximum current of 1000mA.3. All Vendor Specific, Reserved and No Connect pins may be terminated with 50 ohms to ground on the host. Pad 65 (No Connect) shall be left unconnected within the module. Vendor Specific and Reserved pads shall have an impedance than 10 kOhms and less than 100pF.

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400G QSFP-DD to QSFP-DD Active Optical Cable (AOC)最先出现在www.philisun.com。